Semiconductor memory device having self-refresh control circuit

Details Semiconductor memory device having self-refresh control circuit Semiconductor memory device having self-refresh control circuit

1999-08-31

2000-10-24

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Data refresh

G11C 700

Patent

active

061377422

ABSTRACT:
The present invention relates to a semiconductor memory device having a self-refresh control circuit. A conventional semiconductor memory device having a structure of a plurality of banks applies high-voltage word line driving signals individually to the banks in the self-refresh operation, which results in increased power consumption. According to the present invention, a semiconductor memory device having a self-refresh control circuit consists of a plurality of banks receiving word line driving signals and connected with a plurality of global word lines, a high voltage word line driving signal applied to the bank which is being refreshed being charge-shared with the bank to be succeedingly refreshed by a MOS transistor switched by a control signal. Accordingly, the high voltage word line driving signals individually applied to the plurality of banks are charge-shared by the bank to be succeedingly refreshed, and applied, thereby remarkably reducing the power consumption.

REFERENCES:
patent: 5631872 (1997-05-01), Naritake et al.
patent: 5748547 (1998-05-01), Shau

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