Semiconductor memory device having reversing logic means

Static information storage and retrieval – Read/write circuit – Noise suppression

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36518911, G11C 702

Patent

active

060757353

ABSTRACT:
A DRAM having open-bit-lines wherein noise to be impressed to word-lines can be restricted within a certain range. The DRAM includes a logic reversing circuit for reversing the logic levels of a portion of bits in a bit sequence to be stored, and a circuit for recording and detecting whether the logic levels of the portion of the bits is reversed for each stored bit sequences. Logic reversal takes place when one logic level predominates the bits of the bit sequence. Examples of the portion of bits in a bit sequence subject to logic level reversal would be the odd-numbered bits or even-numbered bits in a sequence.

REFERENCES:
patent: 4744085 (1988-05-01), Fukatsu
patent: 5055841 (1991-10-01), Cordell
patent: 5625601 (1997-04-01), Gillingham et al.

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