Semiconductor memory device having redundant memory cell columns

Details Semiconductor memory device having redundant memory cell columns Semiconductor memory device having redundant memory cell columns

1993-02-01

1993-09-07

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Testing

365 63, 36518901, 3652257, 36523003, 36523006, 371 101, G11C 506, G11C 2900

Patent

active

052435709

ABSTRACT:
A semiconductor memory device is rescued from a defective product by replacing a column of regular memory cells containing a defective memory cell with a column of redundant memory cells, and allows a multi-bit data code to be read out partially from regular memory cell arrays as well as partially from the column of the redundant memory cells by permanently disabling a regular column address decoder circuit associated with the column of the regular memory cells replaced with the column of the redundant memory cells so that the other memory cell arrays and the column of the redundant memory cells become concurrently accessible.

REFERENCES:
patent: 4703453 (1987-10-01), Shinoda et al.
patent: 4914632 (1990-04-01), Fujishima et al.
patent: 5126973 (1992-06-01), Gallia et al.
patent: 5132928 (1992-07-01), Hayashikoshi et al.
patent: 5172335 (1992-12-01), Sasaki et al.
patent: 5193074 (1993-03-01), Anami

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