Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-01-25
1995-08-29
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 1300
Patent
active
054466920
ABSTRACT:
An improved SRAM is disclosed including a plurality of memory blocks each having a redundancy memory cell to be shared. In redundancy row decoders 50a, 50b, 50c provided in each memory block, a memory block to be remedied is programmed. Accordingly, a redundancy memory cell row corresponding to each redundancy row decoder can be used for remedy of a defect memory cell in another memory block. Since a defect memory cell may be remedied flexibly, the yield rate in production of semiconductor memories is improved.
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Akai Kiyoyasu
Fujita Koreaki
Haraguchi Yoshiyuki
Mitsubishi Denki & Kabushiki Kaisha
Yoo Do Hyun
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