Semiconductor memory device having redundancy memory cells share

Static information storage and retrieval – Read/write circuit – Bad bit

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36523003, G11C 1300

Patent

active

054466920

ABSTRACT:
An improved SRAM is disclosed including a plurality of memory blocks each having a redundancy memory cell to be shared. In redundancy row decoders 50a, 50b, 50c provided in each memory block, a memory block to be remedied is programmed. Accordingly, a redundancy memory cell row corresponding to each redundancy row decoder can be used for remedy of a defect memory cell in another memory block. Since a defect memory cell may be remedied flexibly, the yield rate in production of semiconductor memories is improved.

REFERENCES:
patent: 4601019 (1986-07-01), Shah et al.
patent: 4807191 (1989-02-01), Flannagan
patent: 5021944 (1991-06-01), Sasaki et al.
patent: 5134583 (1992-07-01), Matsuo et al.
patent: 5233559 (1993-08-01), Brennan, Jr.
patent: 5293348 (1994-03-01), Abe
patent: 5295101 (1994-03-01), Stephens, Jr. et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor memory device having redundancy memory cells share does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having redundancy memory cells share, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having redundancy memory cells share will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1824854

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.