Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1990-03-28
1991-10-01
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
36518901, G11C 1300
Patent
active
050539990
ABSTRACT:
First-In First-Out (FIFO) memory device is disclosed. A ring pointer circuit sequentially and repeatedly selects memory cells in a memory cell array. When it is detected that a defective memory cell exists on a memory cell row, selection of that memory cell row is invalidated by the ring pointer circuit by cutting off a laser trimming line. In addition, by selectively cutting off laser trimming lines in a switching circuit and a redundancy ring pointer circuit, a redundancy memory cell row is selectively added in place of the defective memory cell row. Accordingly, stages required for the ring pointer circuit are maintained. In other words, the FIFO memory device having a defective memory cell is saved, resulting in improvement in yield in the manufacture.
REFERENCES:
patent: 4817056 (1989-03-01), Furutina et al.
patent: 4860260 (1989-08-01), Saito et al.
patent: 4885721 (1989-12-01), Katanosaka
patent: 4914632 (1990-04-01), Fujishima
Matsumura Tetsuya
Yoshimoto Masahiko
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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