Semiconductor memory device having output data buffer unit share

Static information storage and retrieval – Read/write circuit – Testing

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36518905, 371 211, G11C 2900

Patent

active

049823809

ABSTRACT:
For decreasing a semiconductor chip where a semiconductor memory device is fabricated, a memory cell unit and a diagnostic unit are coupled to an output buffer unit through a single data path, and an auxiliary gate control unit is provided in association with the output buffer unit for shifting an output data pin between a high level, a low level and a high impedance state, in which the diagnostic unit checks a plurality of data bits from the memory cell unit to see whether or not the data bits are consistent with one another for producing a first diagnostic signal of either high or low level in a basic testing function but for producing second and third diagnosis signals for shifting the output data pin between the high and low levels and a high impedance state, in which the auxiliary gate control unit steers the output buffer unit in response to the first diagnosis signal or the third diagnosis signal on the single data path but the second diagnosis signal causes the auxiliary gate control unit to steer the output buffer unit for the high impedance state.

REFERENCES:
patent: 3944800 (1976-03-01), Beck et al.
patent: 4481627 (1984-11-01), Beauchesne et al.
patent: 4881200 (1989-11-01), Urai

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