Semiconductor memory device having multiple selector unit simult

Details Semiconductor memory device having multiple selector unit simult Semiconductor memory device having multiple selector unit simult

1993-04-27

1994-10-11

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Testing

36523003, 371 211, G11C 700, G11C 2900

Patent

active

053553420

ABSTRACT:
A semiconductor memory device is subjected to a dynamic bias test upon completion of a fabrication process for screening out a product with potential defects, and a block selecting unit incorporated in the semiconductor memory device is responsive to block address bits for allowing an external device to access data bits stored in one of the memory cell blocks, wherein the block selecting unit is further responsive to a test signal indicative of the dynamic bias test for allowing a diagnostic system to write test bits into or read out the test bits from all of the memory cell blocks, thereby quickly completing the dynamic bias test.

REFERENCES:
patent: 4464750 (1984-08-01), Tatematsu
patent: 4744061 (1988-05-01), Takemae et al.
patent: 4821238 (1989-04-01), Tatematsu
patent: 4873669 (1989-10-01), Furutani et al.
patent: 5016220 (1991-05-01), Yamagata

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