Semiconductor memory device having multibank

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

36523006, 36523008, G11C 800

Patent

active

060260459

ABSTRACT:
There is provided a semiconductor memory device having a multibank in which a single large memory cell is divided into a plurality of banks without increasing power consumption and chip size. In the semiconductor memory device, a memory cell array is divided into a plurality of banks arranged alternately, and each bank includes a plurality of unit memory cell arrays. In addition, column selection lines of each bank are connected to alternate output ports of a column decoder, and the column decoder enables the column selection lines of a bank selected from the plurality of banks in response to address decoding signals and bank selection signals.

REFERENCES:
patent: 5261068 (1993-11-01), Gaskins et al.
patent: 5715209 (1998-02-01), Yoo
patent: 5774409 (1998-06-01), Yamazaki et al.

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