Semiconductor memory device having local and global bit lines

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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Details

C365S230020, C365S189020, C365S154000, C365S226000

Reexamination Certificate

active

07663942

ABSTRACT:
A semiconductor memory device includes a plurality of memory cell columns each having a plurality of memory cells, each memory cell including being a static type, a plurality of local bit lines connected to the memory cell columns, a global bit line connected to the local bit lines via a plurality of sense amplifiers, a measurement terminal to which a measurement voltage is applied in a cell current measurement mode, and a plurality of switching circuits provided to correspond to the local bit lines, and configured to electrically connect the measurement terminal and one of the local bit lines in the cell current measurement mode.

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patent: 6031777 (2000-02-01), Chan et al.
patent: 6560141 (2003-05-01), Osada et al.
patent: 7095652 (2006-08-01), Higashi et al.
patent: 7099218 (2006-08-01), Wicht et al.
patent: 7385864 (2008-06-01), Loh et al.
patent: 7495979 (2009-02-01), Chung
patent: 10-241400 (1998-09-01), None

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