Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1998-02-12
1999-02-02
Nelms, David
Static information storage and retrieval
Read/write circuit
Data refresh
365200, 365201, 36523003, 36523006, G11C 700
Patent
active
058674390
ABSTRACT:
In a semiconductor memory device selectively implementing one of a 4K refresh cycle and a 8K refresh cycle, the positions of externally applied address signal bits are switched internally by address switching circuits such that memory cells at the same positions are selected regardless of whether the 4K refresh cycle or the 8K refresh cycle is specified according to a refresh cycle mode specify signal. As a result, by testing the device in one refresh cycle mode, the device can be checked in both refresh cycle operations, reducing the test time and making the test easier.
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Asakura Mikio
Furutani Kiyohiro
Hidaka Hideto
Yasuda Ken'ichi
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
Nguyen Hien
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