Semiconductor memory device having internal address converting f

Details Semiconductor memory device having internal address converting f Semiconductor memory device having internal address converting f

1996-11-26

1998-04-14

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

365201, 36523003, G11C 700

Patent

active

057401195

ABSTRACT:
In a semiconductor memory device selectively implementing one of a 4K refresh cycle and a 8K refresh cycle, the positions of externally applied address signal bits are switched internally by address switching circuits such that memory cells at the same positions are selected regardless of whether the 4K refresh cycle or the 8K refresh cycle is specified according to a refresh cycle mode specify signal. As a result, by testing the device in one refresh cycle mode, the device can be checked in both refresh cycle operations, reducing the test time and making the test easier.

REFERENCES:
patent: 5315548 (1994-05-01), Ooishi et al.
patent: 5426613 (1995-06-01), Takahashi et al.
patent: 5586076 (1996-12-01), Miyamoto et al.
patent: 5629900 (1997-05-01), Hirose et al.
patent: 5668774 (1997-09-01), Furutani

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