Semiconductor memory device having input/output data signal line

Static information storage and retrieval – Read/write circuit – For complementary information

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Details

365226, 36518905, 365210, G11C 1140

Patent

active

051249472

ABSTRACT:
A semiconductor memory device comprises memory cells arranged in matrix, a plurality of bit line pairs respectively coupled to the columns of the memory cells, a plurality of word lines respectively coupled to the rows of the memory cells and selectively activating the memory cells for porducing small differences in voltage level on the plurality of bit line pairs, respectively, a plurality of sense amplifier circuits respectively coupled to the plurality of bit line pairs and selectively coupling component bit lines of the bit lines pairs to first and second voltage sources depending upon the small differences, first and second data signal lines, a column selector circuit coupling the first and second data signal lines with one of the plurality of bit line pairs, and a pull-up circuit coupled between the first voltage source and the first and second data signal lines for allowing voltage levels on the first and second data signal lines to vary within a predetermined voltage range, wherein a small current path is coupled between the first and second data signal lines and causes the voltage level on one of the first and second data signal lines to follow the other data signal line upon fluctuation at the first voltage source.

REFERENCES:
patent: 4982364 (1991-01-01), Iwahashi

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