Semiconductor memory device having first and second memory...

Details Semiconductor memory device having first and second memory... Semiconductor memory device having first and second memory...

2006-08-22

2006-08-22

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S189050, C365S230060, C365S230030

Reexamination Certificate

active

07095662

ABSTRACT:
A semiconductor memory device including: a first memory cell array including a plurality of memory cells, a first switch circuit for transferring data to be programmed to at least one of the plurality of memory cells arranged in the first memory cell array, a latch circuit for latching the data transferred from the first switch circuit, a first write selector circuit for transferring the data transferred from the latch circuit, a first bit line connected to at least one of the plurality of memory cells and receiving the data transferred from the first write selector circuit, a second memory cell array including a plurality of memory cells that are different from the plurality of memory cells arranged in the first memory cell array, a second switch circuit for transferring data to be programmed to at least one of the plurality of memory cells arranged in the second memory cell array, a second write selector circuit connected to the second switch circuit and transferring the data transferred from the second switch circuit, and a second bit line connected to at least one of the plurality of memory cells arranged in the second memory cell array.

REFERENCES:
patent: 5838610 (1998-11-01), Hashimoto
patent: 6335883 (2002-01-01), Fukuda et al.
patent: 6373746 (2002-04-01), Takeuchi et al.
patent: 6839272 (2005-01-01), Ooishi
patent: 6947315 (2005-09-01), Iwata
patent: 2006/0083064 (2006-04-01), Edahiro et al.

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