Semiconductor memory device having different substrate thickness

Details Semiconductor memory device having different substrate thickness Semiconductor memory device having different substrate thickness

1997-12-23

1999-07-27

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438253, 257391, H01L 2170

Patent

active

059306483

ABSTRACT:
A semiconductor memory device is provided with a semiconductor substrate having a lower semiconductor layer, an upper semiconductor layer and a buried insulation layer interposed therebetween. wherein the upper semiconductor layer has a first and a second regions and a thickness of the first region is smaller than that of the second region; a memory cell area including a plurality of memory cell elements formed on the first region; and a peripheral circuit area including a plurality of peripheral circuit elements formed on the second region.

REFERENCES:
patent: 5250456 (1993-10-01), Bryant
patent: 5455438 (1995-10-01), Hashimoto et al.
patent: 5496758 (1996-03-01), Ema
patent: 5677223 (1997-10-01), Tseng
patent: 5780333 (1998-07-01), Kim

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