Semiconductor memory device having delay circuit for controlling

Details Semiconductor memory device having delay circuit for controlling Semiconductor memory device having delay circuit for controlling

1999-01-11

2000-08-22

Hoang, Huan

Static information storage and retrieval

Read/write circuit

Signals

365226, 36518905, G11C 700

Patent

active

06108249&

ABSTRACT:
An output buffer receives a voltage from a first power supply pin receiving an external power supply voltage for operation. Delay circuits included in an array control circuit, a read control circuit, a write control circuit and an internal clock generation circuit receive a voltage from a second power supply pin receiving the external power supply voltage for operation. Thus, a timing control is accurately performed for reading/writing a data signal without being affected by the change in power supply voltage due to an operation of the output buffer.

REFERENCES:
patent: 5136542 (1992-08-01), Abe et al.
patent: 5461585 (1995-10-01), Chonan

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