Semiconductor memory device having defect relieving system using

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

3652257, 36523003, 36523006, G11C 700

Patent

active

06115301&

ABSTRACT:
A defective address memory circuit stores the address of a defective data line, and outputs a signal for replacing the defective data line depending on the stored address. Decode circuits constituting a decoder group simultaneously output signals for replacing data lines depending on the output signal from the defective address memory circuit. First and second switch groups shift data lines in the direction of a redundant data line depending on an output signal from the decode circuit to instantaneously replace the defective data line.

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