Semiconductor memory device having controller with improved...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S230030, C365S230060

Reexamination Certificate

active

11157834

ABSTRACT:
A semiconductor memory device wherein, in order to control the current consumed in a column address counter and latch block in a read operation, delay units disposed in the column address counter and latch block perform a shifting operation according to a signal CASP6, which is enabled in the write and read operations, and a signal WT6RD5Z, which is enabled in the write operation and disabled in the read operation. Accordingly, unnecessary current consumed in the read operation can be reduced.

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