Semiconductor memory device having constant potential generator

Details Semiconductor memory device having constant potential generator Semiconductor memory device having constant potential generator

1997-08-28

1999-08-03

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Including signal clamping

36518909, 365203, 365202, 365204, G11C 700

Patent

active

059333731

ABSTRACT:
Digit line pairs of a static random access memory device are charged by n-channel enhancement type charge transistors and clamped at an intermediate potential level between a positive power potential level and a ground level by p-channel type clamping transistors after a data read-out and a data write-n, and the p-channel type clamping transistors are gated by column selecting signals so as to be changed between on-state and off-state complementarily to n-channel enhancement type transfer transistors connected between the digit line pairs and a data bus, thereby recovering the digit line pairs to the intermediate potential level.

REFERENCES:
patent: 4975879 (1990-12-01), Auvinen
patent: 5157631 (1992-10-01), Shimogawa

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