Semiconductor memory device having burn-in test function

Details Semiconductor memory device having burn-in test function Semiconductor memory device having burn-in test function

1990-04-16

1992-06-02

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Testing

36518909, 371 214, G11C 2900

Patent

active

051193370

ABSTRACT:
A semiconductor memory device such as dynamic random access memories comprises a work line drive circuit provided with two MOS transistors and a word line to which a word line drive signal is supplied, a substrate bias generation circuit for applying a bias voltage to a semiconductor substrate for MOS transistors, a burn-in mode detection circuit for detecting a burn-in test mode signal, and a substrate bias control circuit for controlling the substrate bias generation circuit. When the semiconductor memory device is subjected to a burn-in test, the power supply level Vcc is increased to raise the voltage of the word line drive signal as compared to that at a normal operation. Accordingly, a high level word line drive signal will be applied to cell transistors, thereby performing correct screening thereof.

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