Semiconductor memory device having burn-in test circuit

Details Semiconductor memory device having burn-in test circuit Semiconductor memory device having burn-in test circuit

1992-05-21

1994-10-04

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Testing

324765, 371 151, 439 54, G11C 2900

Patent

active

053532546

ABSTRACT:
The described embodiments of the disclosed invention provide a semiconductor devices, test apparatus for the semiconductor devices and a method for testing the semiconductor devices. The semiconductor devices may have many different types of pin counts and configurations. Each semiconductor device includes standardized test circuitry. The necessary pins to operate the test circuitry are included in a standardized position on the semiconductor devices relative to the positioning of the semiconductor devices in the test apparatus. Thus a single test apparatus may be utilized to test semiconductor devices having a wide range of pin configurations.

REFERENCES:
patent: 4777434 (1988-10-01), Miller et al.
patent: 4841233 (1989-06-01), Yoshida
patent: 4855672 (1989-08-01), Shreeve
patent: 4871963 (1989-10-01), Cozzi
patent: 5119337 (1992-06-01), Shimizu et al.
patent: 5130645 (1992-07-01), Levy
patent: 5173906 (1992-12-01), Dreibelbis et al.
Electronic Products, May 12, 1983, p. 58.
IBM Tech. Disclosure Bulletin vol. 32 No. 88 Jan 1990 pp. 303-305.

Affiliated with

Also associated with

Rating

Semiconductor memory device having burn-in test circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having burn-in test circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having burn-in test circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-586512