Semiconductor memory device having bit lines and word lines diff

Static information storage and retrieval – Read/write circuit – Simultaneous operations

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Details

365190, 365203, 365206, G11C 1300

Patent

active

052087735

ABSTRACT:
Disclosed is the serial access memory having the improved precharging system of reading bit lines (4). In this serial access memory, an address pointer (9, 114) outputs a signal for selecting one of the reading bit lines (4). Meanwhile, each reading bit line (4) is provided with an MOS transistor (7) for precharging the same. By using the output of the address pointer (9, 114) to control on/off of the MOS transistor (7), the period when each reading bit line (4) is precharged is limited within the period when the reading bit line is selected. As a result, current flowing through the reading bit lines (4) during the data reading can be reduced to achieve the reduction in power consumption of the serial access memory and the increase in the operation speed.

REFERENCES:
patent: 4318014 (1982-03-01), McAlister
patent: 4779228 (1988-10-01), Uchiyama et al.
patent: 5083047 (1992-01-01), Horie et al.

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