Static information storage and retrieval – Systems using particular element – Semiconductive
Patent
1992-03-17
1996-01-09
Nelms, David C.
Static information storage and retrieval
Systems using particular element
Semiconductive
365149, 365203, 257906, G11C 1136
Patent
active
054834821
ABSTRACT:
A semiconductor memory device comprises a plurality of memory cells each including an element with a potential barrier serving as a switching element and a capacitor one terminal of which is connected to the switching element. The memory cells are disposed in a matrix arrangement. Terminals of the respective capacitors which are not connected to the switching elements are connected to each other in intersection with bit lines in the memory cell arrangement to thereby form word lines. Alternatively, the terminals of the respective capacitors connected to the switching elements may be connected to each other in intersection with the bit lines to thereby form word lines.
REFERENCES:
patent: 3196405 (1965-07-01), Gunn
patent: 3676715 (1972-07-01), Brojdo
patent: 4449140 (1984-05-01), Board
patent: 4920513 (1990-04-01), Takeshita et al.
patent: 5267193 (1993-11-01), Lin
E. S. Schlig, "Two-Diode Charge Storage Monolithic Memory Cell", IBM TDB, vol. 16, No. 5, Oct. 1973, pp. 1448.
Malaviya et al., "Pipe-Insensitive Dynamic Bipolar RAM For Polyimide-Filled Trench", IBM TDB, vol. 27, No. 7B, Dec. 1984, pp. 4524-4528.
"Three-Terminal CID as Random Access Memory Cell", R. Koch et al., IEEE Journal of Solid-State Circuits, vol. SC-12, No. 5, Oct. 1977, pp. 534-536.
"The 3T-CID Cell, a Memory Cell for High-Density Dynamic RAM's", G. Grassl et al., IEEE Transactions on Electron Devices, vol. ED-26, No. 6, Jun. 1979, pp. 865-870.
"A Survey of High-Density Dynamic RAM Cell Concepts", P. Chatterjee et al., IEEE Transactions on Electron Devices, vol. ED-26, No. 6, Jun. 1979, pp. 827-839.
"A Vertically Integrated Dynamic Ram-Cell: Buried Bit Line Memory Cell With Floating Transfer Layer", T. Mouthaan et al., Solid-State Electronics, vol. 29, No. 12, 1986, pp. 1289-1294.
Watanabe Yohji
Yamada Takashi
Kabushiki Kaisha Toshiba
Nelms David C.
Tran Andrew Q.
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