Semiconductor memory device having an improved refresh operation

Static information storage and retrieval – Read/write circuit – Data refresh

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36523003, G11C 700, G11C 1300

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active

052511774

ABSTRACT:
An improved arrangement for refreshing a semiconductor memory device comprising a plurality of memory blocks is disclosed. In the memory device, word lines of all memory blocks are commonly controlled by one controller. One of the memory blocks is selected to be subject to the write/read operation. The refresh is performed in the remaining memory blocks while the selected memory block is written or read. The period of time required for the refresh can be decreased.

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