Semiconductor memory device having an automatically activated ve

Details Semiconductor memory device having an automatically activated ve Semiconductor memory device having an automatically activated ve

1995-05-31

1996-08-06

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including signal comparison

36518905, 36523008, 371 212, G11C 700

Patent

active

055440983

ABSTRACT:
A semiconductor memory device having a plurality of nonvolatile memory devices or elements disposed in a matrix arrangement as one or more memory arrays is provided with a write operation and a verify mode which is automatically implemented when the write operation of the memory device ends. In connection with this, an auto-verify function is set in an internal circuit associated with the memory in accordance with a predetermined control signal and wherein a read mode subsequent to the write operation is implemented. During the auto-verify function, the read mode is implemented by effecting a data comparison circuit, such as an exclusive-OR logic circuit, which performs a coincidence
on-coincidence operation comparing the write data and the read data.

REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 4701886 (1987-10-01), Sakakibara et al.
patent: 4788665 (1988-11-01), Fukuda et al.
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5434819 (1995-07-01), Matsuo et al.
Hitachi publication "Hitachi IC Memory Data Book", pp. 489-603, (Jun. 1987) .

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