Semiconductor memory device having an address key circuit for re

Static information storage and retrieval – Read/write circuit – Testing

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Details

365191, 36523008, G11C 700

Patent

active

057320349

ABSTRACT:
An input first stage is used for inputting both addresses and address keys. A test mode setting circuit and a function setting circuit are disposed between the input first stage and an address buffer. Each function setting mode buffer latches an internal address signal when a signal/RAS falls. Further, a function signal generating circuit is initialized by a power-on reset signal when a power supply is turned on.

REFERENCES:
patent: 4507761 (1985-03-01), Graham
patent: 4609985 (1986-09-01), Dozier
patent: 4618947 (1986-10-01), Tran et al.
patent: 4958345 (1990-09-01), Fujisaki
patent: 5596537 (1997-01-01), Sukegawa et al.

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