Semiconductor memory device having a variably write pulse width

Details Semiconductor memory device having a variably write pulse width Semiconductor memory device having a variably write pulse width

1995-05-31

1996-11-19

Nelms, David C.

Static information storage and retrieval

Read/write circuit

36518912, 365194, 365201, 371 6, G11C 700, H03M 1300

Patent

active

055769969

ABSTRACT:
A semiconductor memory device including a write control system for controlling data write to a selected memory cell on the basis of a write control signal, an external terminal for test, a write pulse generating circuit for generating a test write pulse on the basis of a set signal given from the external terminal and the write control signal, and supplying it to the write control system. The write pulse generating circuit includes a pulse-width changing circuit for variably setting a pulse width of the test write pulse on the basis of the set signal. The test write pulse width can be freely and precisely set by using the minimum possible number of external terminals for test. A test write pulse width which agrees with the real capacity of high speed devices can be obtained even by using relatively economical, low speed testing equipment.

REFERENCES:
patent: 4797585 (1989-01-01), Segawa et al.
patent: 5014245 (1991-05-01), Muroka et al.
patent: 5027323 (1991-06-01), Miyamoto et al.
patent: 5144525 (1992-09-01), Saxe et al.
patent: 5367490 (1994-11-01), Akimoto et al.

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