Semiconductor memory device having a transistor, a bit line, a w

Details Semiconductor memory device having a transistor, a bit line, a w Semiconductor memory device having a transistor, a bit line, a w

1996-10-11

1998-02-03

Fahmy, Wael

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257302, 257308, 257298, H01L 27108, H01L 2704, H01L 2992

Patent

active

057147795

ABSTRACT:
A semiconductor memory configuration and a manufacturing process for the semiconductor memory configuration use a polishing process in the manufacture of a semiconductor memory configuration with stacked-capacitor-above-bit-line memory cells. At least TC pillars are created with the aid of a CMP step and a completely planarized surface existing prior to the manufacture of the bit line. Further CMP steps are advantageously used, inter alia, in the manufacture of a TB pillar of a bit line which is countersunk in a trench and of a lower capacitor plate, as well as to completely planarize a cell array and a periphery prior to interconnection of the circuit.

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