Static information storage and retrieval – Read/write circuit – Testing
Patent
1991-12-13
1994-08-16
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Testing
365149, 365205, G11C 2900, G11C 700
Patent
active
053392736
ABSTRACT:
A semiconductor memory device is provided with a plurality of bit lines, a plurality of word lines, a memory cell array including a plurality of memory cells each coupled to one bit line and one word line, and a varying part for varying a capacitance of at least a selected one of the bit lines in response to a predetermined signal which indicates a test mode in which an operation of the semiconductor memory device is tested.
REFERENCES:
patent: 4799197 (1989-01-01), Kodama et al.
patent: 4956819 (1990-09-01), Hoffmann et al.
Dinh Son
Fujitsu Ltd.
LaRoche Eugene R.
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