Semiconductor memory device having a shallow trench...

Details Semiconductor memory device having a shallow trench... Semiconductor memory device having a shallow trench...

2006-07-18

2006-07-18

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S393000, C257S904000, C365S154000

Reexamination Certificate

active

07078774

ABSTRACT:
A semiconductor memory device includes a cell array having matrix-like arrayed plural SRAMs on a semiconductor substrate having an N-well and P-well. The N-well and the P-well are isolated from each other with an isolation region each having a shallow trench structure. Each memory cell includes two CMOS inverter circuits having input and output nodes making a cross-coupled connection. First and second capacitors are connected between each gate node of two CMOS inverter circuits and the N-well and/or N-well.

REFERENCES:
patent: 5489790 (1996-02-01), Lage
patent: 5677866 (1997-10-01), Kinoshita
patent: 6130470 (2000-10-01), Selcuk
patent: 10-79440 (1998-03-01), None

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