Static information storage and retrieval – Read/write circuit – Particular read circuit
Reexamination Certificate
2011-08-09
2011-08-09
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Read/write circuit
Particular read circuit
C365S189050, C365S208000, C365S207000, C365S205000, C365S196000, C365S190000
Reexamination Certificate
active
07995405
ABSTRACT:
A semiconductor memory device having high integration, low power consumption and high operation speed. The memory device includes a sense amplifier circuit having plural pull-down circuits and a pull-up circuit. A transistor constituting one of the plural pull-down circuits has a larger constant than that of a transistor constituting the other pull-down circuits, for example, a channel length and a channel width. The pull-down circuit having the larger constant transistor is activated earlier than the other pull-down circuits and the pull-up circuit, which are activated to conduct reading. The data line and the earlier driven pull-down circuit are connected by an NMOS transistor and the NMOS transistor is activated or inactivated to control the activation or inactivation of the pull-down circuit.
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Akiyama Satoru
Miyatake Shin-ichi
Nakaya Hiroaki
Sekiguchi Tomonori
Takemura Riichiro
Elpida Memory Inc.
Hitachi , Ltd.
Miles & Stockbridge P.C.
Tran Andrew Q
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