Semiconductor memory device having a self-refreshing control cir

Details Semiconductor memory device having a self-refreshing control cir Semiconductor memory device having a self-refreshing control cir

1994-03-30

1995-09-26

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Data refresh

365233, G11C 700

Patent

active

054539595

ABSTRACT:
A semiconductor memory device capable of a self-refreshing operation with a refresh-initiation signal generated in the memory device has a self-refreshing control circuit. A self-refreshing operation is automatically effected, without externally supplied clock signals, with a specific refreshing cycle having an internally set mode entry time period, a burst refresh time period and an internally set pause time period. These time periods are detected by a single counter circuit arranged to count pulses produced from a basic clock pulse signal generated by an oscillator. The burst refreshing is effected with the pulses contained in a pulse signal generated in synchronization with the basic clock pulse signal from the oscillator.

REFERENCES:
patent: 5033026 (1991-07-01), Tsujimoto
patent: 5315557 (1994-05-01), Kim
patent: 5329490 (1994-07-01), Murotani

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