Semiconductor memory device having a reference cell

Static information storage and retrieval – Read/write circuit – Including signal comparison

Reexamination Certificate

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C365S149000, C365S205000, C365S230030

Reexamination Certificate

active

06965531

ABSTRACT:
An open-bit semiconductor memory device includes a plurality of memory cell arrays, wherein half of the memory cells in the memory cell array and half of the memory cells in the adjacent memory cell array store therein complementary data. The memory device further includes a pair of reference cell arrays sandwiching therebetween the memory cell arrays for supplying reference data for reading data from the memory cells in the adjacent memory cells. The reference cell array includes a plurality reference bit lines each connected to reference cells in number smaller than the number of memory cells connected to the bit line, and yet has a resistance and a capacitance equivalent to the resistance and the capacitance of the bit lines.

REFERENCES:
patent: 5828615 (1998-10-01), Mukunoki et al.
patent: 5856938 (1999-01-01), Kasai et al.
patent: 5892724 (1999-04-01), Hasegawa et al.
patent: 6151244 (2000-11-01), Fujino et al.
patent: 6230292 (2001-05-01), Duesman et al.
patent: 6295241 (2001-09-01), Watanabe et al.

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