Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1990-09-18
1993-03-16
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
36518907, 371 103, G11C 700
Patent
active
051950570
ABSTRACT:
This invention configures a semiconductor memory device in the following manner. The semiconductor contains a first memory part and more than one redundant circuit that is used when the first memory part is faulty, and each redundant circuit memorizes in its status memory part whether a second memory part which becomes a spare cell is in a not-in-use status, in an in-use status or in an out-of-use status, which means that a failure exists in the second memory part. If a second memory part is in the out-of-use status, its access is prohibited, and the other second memory part without a failure is accessed. With this configuration, when a spare cell is confirmed to have a failure after the spare cell is programmed, the spare cell is put in the out-of-use status, thereby preventing the spare cell from being accessed. Consequently, the yield of the semiconductor device is increased.
REFERENCES:
patent: 4639897 (1987-01-01), Wacyk
patent: 4905192 (1990-02-01), Nogani et al.
Arayama Yuji
Hirayama Seiji
Kasa Yasushi
Fujitsu Limited
Popek Joseph A.
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