Semiconductor memory device having a plurality of signal...

Details Semiconductor memory device having a plurality of signal... Semiconductor memory device having a plurality of signal...

2005-09-06

2005-09-06

Ho, Hoai (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S189090, C365S191000, C365S196000, C365S230060

Reexamination Certificate

active

06940767

ABSTRACT:
A write-driver/read-amplifier circuit includes a write driver, a GIO equalize circuit and a read amplifier. When a current leaks from or to global data line, a signal applied to a logic gate attains L-level. As a result, the write driver and the GIO equalize circuit stop the operations so that a semiconductor memory device can prevent occurrence of an unnecessary leak current.

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K. Kanda et al., “Abnormal Leakage Suppression (ALS) Scheme for Low Standby Current SRAMs”, ISSCC 2001, pp. 174-175.

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