Semiconductor memory device having a plurality of blocks each in

Details Semiconductor memory device having a plurality of blocks each in Semiconductor memory device having a plurality of blocks each in

1995-10-26

1998-12-29

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Sipo/piso

36523003, G11C 700

Patent

active

058547673

ABSTRACT:
A semiconductor memory device according to the present invention includes a plurality of blocks. A plurality of first selection signals, second selection signals, and third selection signals are provided to the blocks. Each block includes: a memory cell array; a read/write circuit for simultaneously reading out a plurality of data from the memory cell array and subsequently simultaneously writing a plurality of further data into the memory cell array when the corresponding first selection signal is active; a parallel/serial conversion circuit for outputting the plurality of simultaneously read out data, the outputting being performed data by data in a serial manner along the time axis; a transfer gate for a reading operation controlled by the corresponding second selection signal, the gate outputting the plurality of data from the parallel/serial conversion circuit when the corresponding second selection signal is active; a serial/parallel conversion circuit for receiving the plurality of further data, the further data being sequential, and for outputting the plurality of sequential data to the read/write circuit in a parallel manner along the time axis; and a transfer gate for a writing operation controlled by the corresponding third selection signal, the gate outputting the plurality of sequential data to the serial/parallel conversion circuit when the corresponding third selection signal is active. Only one second selection signal is allowed to be active at a given time, while the other remain non-active. Only one third selection signal is allowed to be active at a given time, while the other remain non-active.

REFERENCES:
patent: 3898632 (1975-08-01), Spencer
patent: 4821226 (1989-04-01), Christopher
patent: 4945518 (1990-07-01), Muramatsu
patent: 5086388 (1992-02-01), Matoba
patent: 5222047 (1993-06-01), Matsuda
patent: 5307323 (1994-04-01), Fukuda
patent: 5493535 (1996-02-01), Cho

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