Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1991-04-04
1993-06-08
Larkins, William D.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257306, 257752, H01L 27108
Patent
active
052182193
ABSTRACT:
A dynamic random access memory (DRAM) is disclosed that can effectively prevent the formation of steps in the boundary region of a memory cell array 101 and a peripheral circuit 102, even in high integrated devices. This DRAM includes a double peripheral wall 20 of peripheral walls 20a and 20b at the boundary region of the memory cell array 101 and the peripheral circuit 102 of a P type silicon substrate 1, extending vertically upwards from the P type silicon substrate 1. The upper surfaces of the devices formed on the memory cell array and the peripheral circuit 102 in forming devices on the memory cell array 101 and the peripheral circuit 102 are substantially planarized, by virture of the double peripheral wall 20, to effectively prevent steps from being generated in the boundary region of the memory cell array 101 and the peripheral circuit 102, even in high integrated devices.
REFERENCES:
patent: 4958318 (1990-09-01), Harari
patent: 4994893 (1991-02-01), Ozaki et al.
patent: 5047817 (1991-09-01), Wakamiya et al.
Ajika Natsuo
Arima Hideaki
Hachisuka Atsushi
Motonami Kaoru
Okudaira Tomonori
Larkins William D.
Mitsubishi Denki & Kabushiki Kaisha
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