Semiconductor memory device having a floating gate

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S314000, C257S315000, C257SE21682

Reexamination Certificate

active

07315058

ABSTRACT:
To prevent the extraction of electrons from the floating gate during a read operation. A semiconductor memory device comprises a selection gate3aprovided in a first region on a substrate1through an insulating film2, a floating gate6aprovided in a second region adjacent to the first region through an insulating film5, a first and second diffusion regions7aand7bprovided in a third region adjacent to the second region, and a control gate11provided over the floating gate6athrough an insulating film8, the control gate11intersects with the selection gate3aat different levels, a third diffusion region21is provided in a fourth region located near an extending part of the selection gate3aon the surface of the substrate, the floating gate6ais formed in the form of a side wall, and it has a round part6bat the top on the side directed to the side wall surface of the selection gate3a.

REFERENCES:
patent: 6291297 (2001-09-01), Chen
patent: 6894339 (2005-05-01), Fan et al.
patent: 2005/0029577 (2005-02-01), Nishizaka et al.
patent: 11-354742 (1999-12-01), None
patent: 3249811 (2001-11-01), None

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