Static information storage and retrieval – Read/write circuit – Bidirectional bus
Reexamination Certificate
2008-10-27
2011-11-08
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bidirectional bus
C365S189170, C365S189140, C365S189050, C365S189080, C365S233190, C365S233130, C365S233100, C365S230030
Reexamination Certificate
active
08054699
ABSTRACT:
A semiconductor memory device includes a memory cell array divided into a plurality of areas, a common data bus connected to an input/output circuit, a plurality of individual data buses connected to different areas of the memory cell array through different paths respectively, and a bidirectional buffer connected to the common data bus and the individual data buses. In the semiconductor memory device, the bidirectional buffers transmit data bidirectionally between the common data bus and a selected one of the individual data buses.
REFERENCES:
patent: 6181609 (2001-01-01), Muraoka
patent: 6633179 (2003-10-01), Nakata
patent: 6857039 (2005-02-01), Makino
patent: 6928006 (2005-08-01), Park
patent: 7765019 (2010-07-01), Sinai
patent: 2003/0043682 (2003-03-01), Usuki et al.
patent: 2009/0109767 (2009-04-01), Takahashi et al.
patent: 2001-102914 (2001-04-01), None
patent: 2001-188638 (2001-07-01), None
patent: 2003-77276 (2003-03-01), None
Oishi Kanji
Takahashi Susumu
Elpida Memory Inc.
McGinn IP Law Group PLLC
Tran Andrew Q
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