Semiconductor memory device for reducing noise in operation...

Details Semiconductor memory device for reducing noise in operation... Semiconductor memory device for reducing noise in operation...

2005-04-05

2005-04-05

Tran, M. (Department: 2818)

Static information storage and retrieval

Read/write circuit

C365S205000

Reexamination Certificate

active

06876584

ABSTRACT:
The present invention provides a semiconductor memory device for reducing operation noise, as a sense amplifier in accordance with the present invention senses and amplifies a supplied data signal of a bit line pair on high speed. For this object, the semiconductor memory device includes a first cell array including a plurality of unit cells to be selected by an address signal; a sense amplifying unit for sensing and amplifying voltage level of a bit line connected to the plurality of the unit cells; a switching unit for connecting or disconnecting the sense amplifying unit to the bit line; and a sense amplifying connection unit for controlling the switching unit for connecting or disconnecting the sense amplifying unit to the first cell array by increasing or decreasing an amount of current throughout the switching unit in response to the address signal.

REFERENCES:
patent: 5587960 (1996-12-01), Ferris
patent: 5764572 (1998-06-01), Hammick
patent: 6008689 (1999-12-01), Au et al.

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