Semiconductor memory device for reducing a static current

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

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Details

365195, 365227, 36523003, 36523006, G11C 700

Patent

active

058319115

ABSTRACT:
Present invention is to provide an semiconductor memory device capable of reducing a static current by turning off a bit line pull-up transistor at a write operation. A cell array divided to a plurality of cell blocks; a block decoder for selecting one of the cell blocks; a bit line for transferring a data between the cell and an external circuit; a bit line pull-up circuit for supplying the bit lines with power for preventing a data sensing error; and a bit line pull-up control circuit for disabling the bit line pull-up circuit of selected cell block at the write operation, to prevent a static current from being caused by the bit line pull-up circuit.

REFERENCES:
patent: 5469380 (1995-11-01), Iio
patent: 5574695 (1996-11-01), Suzuki
patent: 5646880 (1997-07-01), Yuh
patent: 5684745 (1997-11-01), Kim et al.

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