Semiconductor memory device for reading charges stored in capaci

Static information storage and retrieval – Read/write circuit – Differential sensing

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365145, G11C 700

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active

060234385

ABSTRACT:
A semiconductor memory device reads data corresponding to charges stored in a capacitor in a memory cell and rewrites the data. This semiconductor memory device removes charges stored in the capacitor in the memory cell to a bit line or absorbs charges stored in the bit line into the capacitor in the memory cell, thereby generating a potential difference between the bit line pair. This potential difference is sensed by a sense amplifier and rewritten. Before the sense amplifier is operated, the potential difference is generated between the bit line pair. The parasitic capacitances of the bit line pair during operation of the sense amplifier are substantially equalized, and in this state, the potential difference is sensed.

REFERENCES:
patent: 4873664 (1989-10-01), Eaton, Jr.
patent: 5850366 (1998-12-01), Coleman, Jr.
Wayne Kinney; "Signal Magnitudes in High Density Ferroelectric Memories"; Integrated Ferroelectrics, 1994, vol. 4, pp. 131-144.
Joseph T. Evans et al.; "An Experimental 512-bit Nonvolatile Memory with Ferroelectric Storage Cell"; IEEE Journal of Solid-State Circuits, 1988, vol. 23, No. 5, pp. 1171-1175.

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