Semiconductor memory device for improving response margin of...

Details Semiconductor memory device for improving response margin of... Semiconductor memory device for improving response margin of...

2007-08-07

2007-08-07

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S233100, C365S205000, C365S189050, C365S185090, C365S239000, C714S761000, C714S762000

Reexamination Certificate

active

11317303

ABSTRACT:
A burst mode compatible semiconductor memory device having a redundancy memory adapted to repair a normal memory is disclosed. Response margin for a redundancy flag signal and redundancy driving method is improved by sensing generation of an internal address corresponding to an embedded address, and generating a redundancy flag signal, such that the embedded address is an address preceding the address of the memory cell of the normal cell array to be repaired by at least one clock.

REFERENCES:
patent: 6134179 (2000-10-01), Ooishi
patent: 6285606 (2001-09-01), Ozeki
patent: 10-74386 (1998-03-01), None
patent: 2001236794 (2001-08-01), None
patent: 1020050027922 (2005-03-01), None
KO 1999-0065226, Aug. 5, 1999.
KO 1999-0079136, Nov. 5, 1999.

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