Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2005-05-03
2005-05-03
Tran, M. (Department: 2818)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230060
Reexamination Certificate
active
06888775
ABSTRACT:
A semiconductor memory device according to the present invention includes: a data line switching circuit including a plurality of switches which selectively connect one of a plurality of normal data lines and spare data lines included in a memory cell array to one of a plurality of global data lines for transmitting input/output data to the memory cell array; and a switching control circuit including a shift decoder having decode circuits for decoding a defective address stored in a program circuit as many as the switches.
REFERENCES:
patent: 4428068 (1984-01-01), Baba
patent: 4471472 (1984-09-01), Young
patent: 2000-100191 (2000-04-01), None
patent: 2001-6389 (2001-01-01), None
patent: 2001-256794 (2001-09-01), None
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