Semiconductor memory device control method thereof, and...

Details Semiconductor memory device control method thereof, and... Semiconductor memory device control method thereof, and...

2006-04-25

2006-04-25

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S229000

Reexamination Certificate

active

07035156

ABSTRACT:
In a semiconductor memory device which has a plurality of operation modes and can reduce a consumed electric current by carrying out the switching control of an internal signal for every operation mode by required minimum control, a control method thereof, and a control method of a semiconductor device, there are provided an address switching circuit13for propagating either a refresh address ADD (Ref) from a refresh counter14at a time of a refresh mode or an external address ADD (R/W) at a time of data-input/output mode as internal address ADD (INT), a mode discriminating circuit11for discriminating between a refresh operation requesting signal REQ (Ref) and a data input/output requesting signal REQ (R/W) and for outputting a mode discriminating signal M, and a switch holding circuit12for outputting a switch change-over signal SW in accordance with the mode discriminating signal M, and the connection of the address switching circuit13is switched only at a time of a mode change.

REFERENCES:
patent: 6215714 (2001-04-01), Takemae et al.
patent: 6324113 (2001-11-01), Tomita

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