Semiconductor memory device comprising pseudo ground pad and...

Details Semiconductor memory device comprising pseudo ground pad and... Semiconductor memory device comprising pseudo ground pad and...

2006-07-03

2010-02-16

Loke, Steven (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C438S637000

Reexamination Certificate

active

07663243

ABSTRACT:
A semiconductor memory device comprising a pseudo ground voltage pad and a method of making the semiconductor device are disclosed. The semiconductor memory device comprises a plurality of pads that are respectively adjacent to one another in a first direction. The plurality of pads comprises a plurality of ground voltage pads and a plurality of data pads. The semiconductor memory device further comprises a first peripheral circuit ground line disposed adjacent to the pads and extending in the first direction, and an insulating layer formed on a portion of a first region of the semiconductor memory device comprising the plurality of pads and at least a portion of the first peripheral ground circuit line, wherein a region of the first peripheral circuit ground line is exposed to define a pseudo ground voltage pad, and the pseudo ground voltage pad is adjacent to one of the data pads.

REFERENCES:
patent: 6617622 (2003-09-01), Kudou et al.
patent: 2001/0023981 (2001-09-01), Ikumo et al.
patent: 2006/0060986 (2006-03-01), Kim et al.
patent: 2007/0057377 (2007-03-01), Park
patent: 59-023541 (1984-02-01), None
patent: 11-330356 (1999-11-01), None
patent: 1020010057919 (2001-07-01), None

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