Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1994-03-10
1995-06-06
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365201, 365222, G11C 700
Patent
active
054228514
ABSTRACT:
The VRAM according to the present invention can readily and accurately verify from the outside whether a redundant circuit is being used or not, without provision of a new terminal. The VRAM includes a command signal generating circuit and a switch. The command signal generating circuit responds to a control signal externally received through an external terminal and an address signal to generate a command signal. The switch responds to the command signal from the command signal generating circuit to select between a quote signal from a quote signal generating circuit and a redundant signal from a fuse circuit. The selected signal is provided through one monitor terminal. The quote signal indicates which data stored in the upper side or lower side of a serial register is being provided. The redundant signal activates a redundant circuit.
REFERENCES:
patent: 4480199 (1984-10-01), Varshney et al.
patent: 5124949 (1992-06-01), Morigami
Mitsubishi Denki & Kabushiki Kaisha
Popek Joseph A.
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