Semiconductor memory device capable of suppressing a...

Details Semiconductor memory device capable of suppressing a... Semiconductor memory device capable of suppressing a...

2008-06-06

2011-10-11

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S200000, C365S206000, C365S198000, C365S191000

Reexamination Certificate

active

08036053

ABSTRACT:
Semiconductor device and semiconductor memory device include a plurality of internal circuits configured to perform test operations in response to their respective test mode signals and a plurality of test-mode control units configured to control the test operations of the internal circuits to be disabled in response to a test-off signal.

REFERENCES:
patent: 6546510 (2003-04-01), Mazumder et al.
patent: 7068548 (2006-06-01), Nakamoto et al.
patent: 2006/0198222 (2006-09-01), Rudeck et al.
patent: 2007/0025169 (2007-02-01), Houston
patent: 100140176 (1998-03-01), None
patent: 100252658 (2000-01-01), None
patent: 1020050003062 (2005-01-01), None
patent: 1020060056551 (2006-05-01), None
Translation of KR 10-2005-0003062, published Jan. 10, 2005, 23 pages.
Notice of Preliminary Rejection issued from Korean Intellectual property Office on Jan. 23, 2009 with an English translation.
Notice of Allowance issued from Korean Intellectual Property Office on Apr. 7, 2009 with an English Translation.

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