Semiconductor memory device capable of refresh operation in burs

Details Semiconductor memory device capable of refresh operation in burs Semiconductor memory device capable of refresh operation in burs

1995-08-28

1997-08-19

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

36523003, 365233, 3652385, G11C 700

Patent

active

056595158

ABSTRACT:
A semiconductor memory device comprising a memory cell array, a row decoder, an input/output register train, a burst counter, an input/output bus, a refresh counter and a multiplexer. The memory cell array includes a plurality of word lines, a plurality of bit line pairs and a plurality of memory cells. The input/output register train has a plurality of registers corresponding to the bit line pairs. Each of the registers is connected to the corresponding bit line pair. The input/output bus inputs and outputs data to and from the register train in response to a signal from the burst counter. The multiplexer supplies the row decoder with an external address signal as an internal address signal. After data is transferred from any bit line pair to the register or before data is transferred from any register to the bit line pair, the multiplexer supplies the row decoder with a refresh address signal from the refresh counter in place of the external address signal. This allows a refresh operation to take place during a burst read/write operation of data.

REFERENCES:
patent: 4185323 (1980-01-01), Johnson et al.
patent: 4691303 (1987-09-01), Churchward et al.
patent: 5253211 (1993-10-01), Suzuki
Designing CMOS VLSIs, published by Baifukan in Japan, Apr. 25, 1989.
Shoji Hanamura et al., A 256K CMOS SRAM with Internal Refresh, IEEE International Solid-State Circuits Conference, 1987, pp. 250-251 and 414.

Affiliated with

Also associated with

Rating

Semiconductor memory device capable of refresh operation in burs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device capable of refresh operation in burs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device capable of refresh operation in burs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1109942