Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
2005-08-09
2005-08-09
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S230030
Reexamination Certificate
active
06928006
ABSTRACT:
Disclosed is a semiconductor memory device which is capable of reducing noise during an operation thereof by individually supplying clamping voltages to respective banks. The semiconductor memory device includes: a plurality of banks; a plurality of clamping voltage supply units corresponding to the plurality of banks, for supplying clamping voltages to the corresponding banks, in which the clamping voltages are obtained by clamping an external power supply voltage to a predetermined level; and a clamping voltage control units for controlling the plurality of clamping voltage supply units to allow the corresponding clamping voltages to be supplied to selected banks while the selected banks are activated.
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Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
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