Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2007-08-13
2008-09-09
Mai, Son L (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S189040, C365S154000, C365S156000, C365S230050
Reexamination Certificate
active
07423916
ABSTRACT:
Level control signals are both set to H level, and potentials of power supply lines are both set to be lower than a power supply potential. In this manner, a gate leakage current during waiting and writing operation of a memory cell array can significantly be reduced. The level control signals are set to L level and H level respectively, and solely the potential of one of the power supply lines is set to be lower than the power supply potential. In this manner, power consumption during a reading operation of the memory cell array can be reduced.
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Chinese Office Action, with English Translation, issued in corresponding Chinese Patent Application No. CN 200410004801, issued on Nov. 30, 2007.
“Dynamically Controllable DC Level Converter (DCLC) Technique to Reduce Power Dissipation, and Application to High-Speed, Low-Power Circuits”, Yoshinori Oka et al., Technical Report of IEICE. SDM2001-122, ICD2001-45, Aug. 2001, pp. 69-76.
Mai Son L
McDermott Will & Emery LLP
Renesas Technology Corp.
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